ISRO CSE 2011
Q41.
A processor takes 12 cycles to complete an instruction I. The corresponding pipelined processor uses 6 stages with the execution times of 3,2,5,4,6 and 2 cycles respectively. What is the asymptotic speedup assuming that a very large number of instructions are to be executed?Q42.
If a microcomputer operates at 5 MHz with an 8-bit bus and a newer version operates at 20 MHz with a 32-bit bus, the maximum speed-up possible approximately will beQ43.
Three coins are tossed simultaneously. The probability that they will fall two heads and one tail isQ44.
There are three processes in the ready queue. When the currently running process requests for I/O how many process switches take place?Q45.
Let T(n) be defined by T(1)=10 and T(n+1)=2n+T(n) for all integers n \geq 1. Which of the following represents the order of growth of T(n) as a function of n?Q47.
A fast wide SCSI-II disk drive spins at 7200 RPM, has a sector size of 512 bytes, and holds 160 sectors per track. Estimate the sustained transfer rate of this driveQ50.
Which one of the following in place sorting algorithms needs the minimum number of swaps?